1. Field of the Invention
The present invention relates to an erase circuit for a flash memory device, and more particularly, an erase circuit for a flash memory device which can verify an address of a fail erased memory cell when the erase verify operation is performed after erasing a memory cell.
2. Description of the Prior Arts
Generally, in erase operation of flash memory device, an erase verify operation is performed to verify whether erasing normally is done or not after performing the erase operation. In the prior art, in erase operation, the erase voltage is applied to a total memory cell or a memory cell which is divided into unit blocks. After performing the erase operation, an erase verify operation is performed, at this time, if an arbitrary memory cells would not be erased, that is, fail erased memory cell was generated, user didn't know the address of fail erased memory cell. In addition, it is difficult to design an erase verify circuit because the range of threshold voltage of erased memory cell is so wide when memory cell, particularly, chip is erased. And, user does not know whether the established erase verify scheme is right because the address of fail erased memory cells are not known.